1. Field of the Invention
The present invention relates generally to processes for semiconductor wafers and, more particularly, to control and specification of temperature processes for a semiconductor processing furnace.
2. State of the Art
Semiconductor processing advancements continue to facilitate reduction in feature dimensions which in turn results in increased performance and circuitry integration. While feature size reductions have been considerable, continuous improvements are being pursued. With the reduction in feature size, the criticality of accurate control during manufacturing processes becomes more essential. Specifically, the temperature imposed upon a semiconductor wafer during a manufacturing process affects the diffusion of dopants, as well as the deposition of materials on the semiconductor wafer. Thus, it is important that processing systems achieve accurate control to obtain the desired effect on the semiconductor wafer undergoing processing.
In order to maintain an acceptable level of quality control, many semiconductor processes are performed in iterative incremental “runs” that allow for control feedback to be entered into the processing specification of each subsequent run. On a specific run, a process specification may include a set-point temperature, temperature process duration, a temperature ramp rate, etc., that define the overall thermal process to be encountered by the semiconductor wafer.
Process specifications may be further complicated by the introduction of a gas or other vapor which may also be affected by the temperature and thermal profile. Therefore, various temperature control problems must be attended to by a processing system in order to maintain an acceptable level of quality control, i.e., yield, of semiconductor wafers. In an effort to enhance the yield of operable circuits on a wafer, it would be desirable that each wafer in a group or “batch” be subjected to the same temperature conditions over an entire thermal processing cycle or run. If uncontrolled, the variations in the processing of the semiconductor wafers within a batch result in unacceptable deviations and such deviations are further exaggerated over subsequent runs which inject further deviations into the overall process.
A still further temperature control problem exists in thermal processing systems, such as furnaces, that utilize multiple heating elements. Multiple-zone furnaces can be used to better optimize the thermal profile in larger furnaces capable of handling a large number of wafers. Large capacity furnaces are designed with multiple heating elements to provide more uniform heating across the entire cavity of the furnace. However, due to the nature of a zone's heat flow, as well as the interactive nature of adjacent zones within an open cavity, thermal variations can and do exist within a single cavity of a multi-zone furnace. While it is possible to control a specific zone within a multi-zone configuration, the affect of the interaction between zones has largely gone unaddressed and unappreciated. While one or more wafers within a specific zone may be evaluated following the completion of a specific run, thermal compensation for such processing deviations have been limited to an adjustment of that specific zone for a subsequent thermal process during a subsequent run of that specific wafer or group of wafers, regardless of the influence or affect of such an adjustment on other wafers within other zones of the system.
Thus, it is desirable to implement a system and method that takes into account the affect of modifications of thermal adjustments implemented in one zone and the related effect of such an adjustment on the other zones within the system.